Leonard Charles Perham
Analyst · Benchmark
Thank you, Bev, and good morning, everyone. Thank you for joining us this morning. I'm going to begin today's call with an update on our design win efforts for the Bandwidth Engine family of products, and now a bit of an update on our new product, the LineSpeed family. And then provide you a review of our progress on Bandwidth Engine 2 and other activities of the company in the recent quarter. Jim will then review our first quarter financial results prior to opening the call for your questions. Regards to design wins. Sales activity across all regions continues at a strong pace. Building on this momentum, we continue to aggressively pursue additional design wins for our Bandwidth Engine family of ICs in the first quarter of 2013, as well as advance our pipeline of design wins in progress. These efforts have been rewarded as we are making gratifying process across a wide front. In February, we received our first order for Bandwidth Engine 2. We received this order from a Tier 1 network equipment manufacturer, and we've been actively working on this opportunity for some time. And from the looks of it, the customer is jumping over testing on evaluation boards and getting right into subsystem prototyping. Because you sort of short-circuited out our system, for today, I'm going to call it to design and tell you it's a strong indication of a design win. We are operating under a stringent NDA, so we'll not identify the company by name. However, we've been working closely with this customer for the last 4 or 5 quarters on this architecture. Yesterday, when I wrote this, I had this next sentence: We might even be able to let you know this potential win has extended to other platforms in the next quarter or so. But I can tell you now that it's already extended to other platforms. We've received the second prototype and order from this customer yesterday. Very exciting. Additionally, we won another platform with one of our existing customers and have also completed an extensive board level evaluation and yet another. Completion of this board level evaluation could result in another design win in the next quarter or 2. To a small emerging company like MoSys, design wins cannot be won fast enough. However, we made solid progress in the first quarter and hope to report continuing progress on this front 3 months from now. But we've had gratifying results throughout this quarter we're reporting on, up to and including the unexpected events of yesterday regarding our Tier 1 partner. Let's talk about the Bandwidth Engine 2. Packaged units arrived back at the company in early March, and we're well under product characterization, functional testing and reliability certification. To date, BE2 is performing like a champ, meeting or exceeding its various requirements, meeting its functional tests, and the engineering guys like to tell me, "We can't say that it's 100% good yet. We have to do live tests and liability testing." However, whenever I ask questions, they all say, "We can't find a reason it doesn't work." In other words, we're making excellent progress and it looks like this mask revision might, in fact, be totally good. We are on track to fill any and all sample of prototyping orders released for shipment in this quarter, so we've made a good progress across the testing front and meeting the requirements that we mandate for ourselves before we ship samples and prototypes. We can support all the requirements for samples and prototypes for BE2 in this quarter. Though much remains to be done, we're extremely gratified with the progress to date. We have early interest from potential customers who become very familiar with the unique advantage of the Bandwidth Engine family, and find a need, for example, the higher I/O speed of BE2, the burst mode capability of BE2 or even the increased availability of macro functions found in BE2 but not in BE1. In short, the performance requirements of the next generation systems under design have convinced them they should use BE2 with levels of performance and/or its extended functional capability. We are very enthusiastic about the progress we've made with BE2 in such a short period of time. And as such, I would like to enthusiastically congratulate the MoSys team that has created such a dynamic and powerful system-level solution. The amount of time and personal sacrifice that the team extended to define, design and tape out the chip was considerable indeed. Beyond that, the efforts put in to design verification and time and closure, resulting in functionally correct parts on the first mask release. I truly appreciate it. I have to say I'm very proud to be a part of this team. Let's talk a little bit about the third member of the Bandwidth Engine 2 family, what we call BE2 Macro. Last quarter, we announced the first 2 members of the Bandwidth Engine 2 family of integrated circuits, designed to meet the requirements of next-generation 100-gig, 200-gig, and 400-gig networking systems. The first of these, BE-2 Burst, the MSR620, is optimized for high-speed buffering applications. The second, BE2 Access, the MSR720 is optimized for high-speed access applications. During this first quarter, we followed these announcements through the unveiling of a third member of the Bandwidth Engine 2 family, that being Bandwidth Engine 2 - Macro, with onboard functions that support the needs of 400-gig networking equipment. The Bandwidth Engine 2 - Macro or MSR820 represents a significant step-up intelligence for the system designer to draw upon. It delivers the highest access rate throughput of any device currently available on the market and is designed with offload accelerators for metering, statistics, accounting and other critical system functions that state-of-the-art line cards have to perform. The MSR820 delivers up to 12 billion operations per second for onboard or host-based processing, eliminating as many as 6 to 8 transactions with a single command. This industry-leading performance enables networking architects to reduce power, reduced pin count and host resources in a very meaningful way. The macro functions can complete entire operations in 30 nanoseconds or less, far quicker and substantially lower power than any alternative solutions, making BE2 Macro a device unique to the industry and its capabilities. With our 3 new tightly focused Bandwidth Engine family members that I've just discussed, the 620, 720 and 820, we will be bringing to market a wide range of solutions to meet the challenges facing the systems architects and designers grappling with the challenges of 100-gig, 200-gig and 400-gig networking equipment. Now let's talk about this new product that we didn't mentioned on the last call. We call it, trademark or copyrighted, the LineSpeed Gearbox. I had mentioned on previous calls that we were always doing a little something out of the box. So looking further at the evolution of networking equipment, it has transitioned to a high-capacity processing systems consisting of highly parallel, multi-threaded SOCs that require an inordinate amount of memory bandwidth. We developed the Bandwidth Engine family of products to address this need. These high performance line cards must be capable of aggregating hundreds of gigabits of data using many 10-gig, 40-gig and 100-gig interfaces. This need for speed and density on the line card -- recognizing this need for speed and density on the line card refer to leverage our IP and expertise to launch the LineSpeed 100-gig, Multi-Mode Gearbox PHY integrated circuit, MSH310. This very high-performance SerDes device is our first nonmemory product imported to support next-generation networking, data center and communication systems, and we expect it to be the first in our family of LineSpeed products. The MSH310 device is designed to support 10-gig, 40-gig and 100-gigabit industry standards for line cards and modules. The LineSpeed IC can be used on line cards to enable next-generation network and data center systems to efficiently support hundreds of gigabits of aggregated bandwidth per line card, using multiple combinations of high-density ports. For flexibility, the MSH310 supports both in short -- both short and extended reach data path applications. It can also be used inside the optical modules themselves as a power and cost alternative, replacing legacy solutions fabricated using expensive and outdated silicon germanium technologies. We recently successfully demonstrated the functionality and the extended reach capability of this LineSpeed solution at DesignCon and at the Optical Fiber Conference in San Diego. These 2 events generated a great deal of interest and significant booth traffic from prospective customers. We are in discussions regarding potential reference boards and evaluations with more than a handful of customers. With its ability to process data for extended reach applications, LineSpeed will transmit and receive data further or across lower-cost materials than other very short and/or short-reach competitive devices, which may only support a limited amount of line card at trace length. The LineSpeed Gearbox is proven to be functional with a complete set of features in its present form. We are continuing to characterize and fine tune certain line of features in preparation for various customer applications, and we fully expect to be in the position to sample this product in this quarter. The combination of our LineSpeed Gearbox to enable high-port density and our Bandwidth Engine family of ICs for accelerating packet processing capabilities supports the requirements for increased speed and intelligent data processing on networking -- on next-generation networking line cards. We are very excited about this new product and its potential for creating additional opportunities for MoSys to increase its product content in our customer systems. Our LineSpeed products leverage similar high-speed SerDes technology and expertise required in present and future Bandwidth Engines. The market for high-density 10-gig, 40-gig and 100-gig capability is in its early stages and growing quickly. We were able to develop this additional product, the first of a new family, with a strong value proposition at a fraction of the normal R&D cost. And plan to utilize our existing sales channel to further expand on our customer base. You can expect that we will be adding more products to the LineSpeed family in the quarters ahead. A little bit on Gen3. The definition of Gen3, the memory-based product beyond Bandwidth Engine 2, is now complete in the hands -- and in the hands of our design department, and we expect to see silicon in the first half of 2014. It will not be compatible to BE1 or BE2, and it will set a new benchmark as a highly intelligent, uniquely architected networking memory. Its definition, architecture and feature set were derived from many meetings with our customers and partners, and it will substantially enlarge the served available market that our Bandwidth Engine family currently serves. In a nutshell, what I'm calling Gen3 is a very serious technical contribution to a future of networking system designs. Closing. The first quarter 2013 has been very kind to us with progress on many fronts. The new BE2 and the LineSpeed product, first in the new family, both seem to be meeting their goals and objectives right from the outset. Customer interest in BE1, BE2 and the LineSpeed family is very robust as illustrated by design wins, orders for samples and/or prototyping quantities of these various products. I'm feeling very good about our progress this past quarter and hopeful that we will see the same progress and success rate in this, the current quarter. With that, I'm going to turn this call over to Jim to discuss our first quarter financials. We will then open the call for questions. Thank you for your time and thank you very much for your attention.