We are accelerating selected investments because several of our new growth business are moving from technology development into a commercial execution, which faster than our original capacity roadmap anticipated. We are seeing three things happen at the same time. The market is expanding as the AI infrastructure drives higher requirement for bandwidth, power delivery, memory, performance, and system integration. Our customer engagement are also progressing from qualification into production ramps and capacity planning. At the same time, our solution roadmap is moving forward with a product already in mass production and additional product completing tape out, customer validation, and new generation of product already under development. Our focus now is shifting from whether this opportunity will materialize, to how quickly can we expand capacity to meet the customer demand. Under our current expansion roadmap, we are targeting monthly capacity approximately 18,000 wafers for silicon photonics, 22,000 for DTC and silicon capacitor, and 20,000 for TFLN modulators. This next phase of the capacity will start its ramp in late 2028 and reach its final scale by 2030. This is not a broad-based capacity expansion. We are directing our capital toward customer-backed growth opportunities that will fuel UMC's next phase of growth. That will give you a feel of why we are accelerating and milestones that we plan for those CapEx. For your question on the silicon photonics and advanced packaging, we believe UMC is well-positioned to capture the next wave of AI infrastructure opportunities through our competitive silicon photonics performance and proven manufacturing execution and advanced packaging capability. In silicon photonics, our data indicate that our PIC technology outperform peers in key parameters such as propagation loss, supported by our manufacturing high production yield now. Our 12-in PIC platform already support a 1.6T optical application, while our 8-in TFLN platform has completed 1.6T system validation with an industry-leading yield. Building on this achievement, our roadmap extend toward 300G per lane, and ultimately 400G per lane solution for next generation 3.2T applications, supported by hybrid bonding, TSV, and chip-to-wafer integrations. For the advanced packaging, we are making progress in two key solution areas. EDTC for power delivery and customized memory stacking. Our discrete eDTC solution for mobile will enter mass production this quarter. For AI and server application, our substrate embedded DTC solution has completed tape-out and functional verified. With our customized memory stacking solution has passed initial customer verification to address the growing bandwidth requirement of AI inference. All those achievements that demonstrate UMC's ability to translate technology innovation into the commercial execution now. By combining the device performance, manufacturing expertise, and close customer cooperation, we are expanding our role in next generation AI infrastructure, helping the customer to address the three critical requirements, including faster optical connectivity, more efficient power delivery, and high memory bandwidth. That's why we believe that we are in a great position to capture those opportunities.